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ES4428/ES4427 Web/DVD Set-Top Box Solution Product Brief
DESCRIPTION
The ES4428/ES4427 Web/DVD Internet set-top box chipset seamlessly combines both Web browser technology and DVD technology into a highly integrated, low-cost solution for the next generation of Internet set-top boxes for home use. The ES4428, which is based on ESS's Programmable Multimedia Processor (PMP) device architecture, includes a programmable internal RISC processor core that makes it adaptable for use in embedded systems applications such as set-top boxes. The ES4427 companion chip supplies proper video sync capabilities and performs NTSC- and PAL-based video encoding and decoding as necessary to provide broadcast quality video to the television screen. The ES4428 DVD processor integrates MPEG-based audio and video data stream decoding for DVD/VCD/SuperVCD playback, DVD system navigation and Dolby AC-3 decoding into a single device. The ES4428 demuxes the incoming DVD audio and video data streams from the DVD loader using its glueless 8/16bit parallel interface, which is hardware-compatible with many DVD loaders. The ES4428 also supports both 8- and 16-bit Flash/Read-Only Memory (ROM) and 8- and 16-bit Synchronous DRAM (SDRAM) memory I/O operations. The ES4428 controls data I/O transactions to and from the ES4427 companion chip through its 8-bit Device Serial Connect (DSC) parallel bus interface. The ES4428 also provides a 16-bit wide hardware interface with V.90-compatible modem subsystems incorporated into the set-top box design. The ES4427 incorporates a multi-standard TV encoder that supports both the NTSC and PAL formats and CCIR-601 nonsquare operations. Two microphone ADCs and PLL clock synthesizers are incorporated in the ES4427 device architecture. The ES4427 includes an I/O-mapped auxiliary expansion port that interfaces with the ES4428. Four pins of the port can be configured as edge-triggered interrupts, supporting critical functions, such as handling remote control and modem interrupt requests, DVD/VCD loader resets and modem board resets.
ES4428 FEATURES
* On-chip hardware interface with V.90 data/fax/voice modem
subsystem implemented
* 640 x 480 NTSC and 640 x 576 PAL television video formats
supported
* Configurable for browser/DVD applications * Hardware support for infrared remote control and/or wireless
keyboard
* On-chip MPEG audio/video decoder and system parser * On-chip on-screen display (OSD) controller supports 4-bit
blending.
* On-chip subpicture unit (SPU) decoder supports karaoke lyric,
subtitle and closed captioning functions.
* VideoCD 1.1 and 2.0, Interactive 3.0, Super VCD and Audio CD * * * * *
compatibility available with Video CD / Super VCD player configuration VideoCD 1.1 and 2.0, Interactive 3.0, Super VCD, Audio CD and MP3 compatibility available with Super VCD / DVD player configuration DTS audio decoding supported Programmable multimedia processor architecture ISO/IEC 13818-2 MPEG-2 compliant ISO/IEC 11172 MPEG-1 compliant
ES4427 FEATURES
* 8-bit DSC parallel bus interface generates edge-triggered
interupts for data read/write interfacing with ES4428
* Dual microphone and vocal assist hardware support provided * PLL clock synthesizer based on 27 MHz crystal input generates
required clocks for video encoder, video DACs and video processor
SOFTWARE SUPPORT
* Software stack support for the POP3, SMTP and SNMP Internet
e-mail protocols defined by RFC 821, RFC 1157and RFC 2449
Command and register accesses are issued through the DSC interface from the ES4428 DVD processor to the ES4427 through the device serial communication (DSC) interface for accessing the internal registers of the ES4427. The DSC interface port is comprised of three interface signals, the strobe (DSC_S), data (DSC_D), and clock (DSC_C). The DSC port is selected when the DSC strobe goes high and latches the data at the rising edge of the clock. Each 16-bit DSC transfer is comprised of an address followed by data.
The ES4428 is available in an industry-standard 208-pin Plastic Quad Flat Pack (PQFP) package, while the ES4427 is available in an industry-standard 100-pin PQFP package.
* Software stack support provided for the HTTP Web browsing
protocol defined by RFC 1945, RFC 2068 and RFC 2616
* Software stack support provided for the TCP/IP Internet
protocols defined by RFC 791 and RFC 793
* Software stack support provided for RTP payload format for * * *
MPEG-1/2 and H.261 video streaming protocols defined by RFC 2032, RFC 2038 and RFC 2250 Software support for HTML 1.0, 2.0 and 3.2, *.aiff, *.au and *.wav audio file formats and *.gif, *.jpg and *.xbm graphic file formats, JavaScript 1.1, SSL 2.0 and SSL 3.0 Character generation and software support for English, Big 5/GB Chinese and Japanese fonts Software support for infrared remote control and wireless keyboard
ESS Technology, Inc.
SAM0358-052201
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ES4428/ES4427 PRODUCT BRIEF
ES4428 PINOUT
Figure 1 shows the ES4428 device pinout.
VSS NC NC NC NC NC NC NC VCC VSS NC NC NC NC NC HD15 HD14 VCC VSS HD13 HD12 HD11 HD10 HD9 HD8 HD7 VCC VSS HD6 HD5 HD4 HD3 HD2 HD1 HD0 VCC VSS HSYNC# VSYNC# PCLKQSCN PCLK2XSCN YUV7 YUV6 YUV5 VSS VCC YUV4 YUV3 YUV2 YUV1 YUV0 DCLK VCC NC VPP AUX0 AUX1 AUX2 VSS VCC AUX3 AUX4 AUX5 AUX6 AUX7 LOE# VSS VCC LCS0# LCS1# LCS2# LCS3# VSS LD0 LD1 LD2 LD3 LD4 VCC VSS LD5 LD6 LD7 LD8 LD9 LD10 LD11 VSS VCC LD12 LD13 LD14 LD15 LWRLL# LWRHL# VSS VCC NC NC LA0 LA1 LA2 LA3 VSS 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53
ES4428 208-Pin PQFP Package
VCC VSS DSCK DQM DCS0# VCC VSS DCS1# DB15 DB14 DB13 DB12 VCC VSS DB11 DB10 DB9 DB8 DB7 DB6 VSS VCC DB5 DB4 DB3 DB2 DB1 DB0 VSS VCC DRAS2#/DBANKSEL0 DRAS1#/DBANKSEL1 DRAS0# DWE# DOE#/DSCK_EN DCAS# VCC VSS DMA11 DMA10 DMA9 DMA8 DMA7 DMA6 VSS VCC DMA5 DMA4 DMA3 DMA2 DMA1 DMA0
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VCC LA4 LA5 LA6 LA7 LA8 LA9 VSS VCC LA10 LA11 LA12 LA13 LA14 LA15 LA16 VSS VCC LA17 LA18 LA19 LA20 LA21 RESET# TDMDX/RSEL VSS VCC TDMDR TDMCLK TDMFS TDMTSC# TWS/SEL_PLL1 TSD/SEL_PLL0 VSS VCC SEL_PLL2 NC NC MCLK TBCK NC NC VSS VCC RSD RWS RBCK APLLCAP XIN XOUT VCC VSS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52
Figure 1 ES4428 Device Pinout
ESS Technology, Inc.
ES4428/ES4427 PRODUCT BRIEF
ES4428 PIN DESCRIPTION
Table 1 lists the pin descriptions for the ES4428.
Table 1 ES4428 Pin Descriptions
Name Number 1, 9, 18, 27, 35, 44, 51, 59, 68, 75, 83, 92, 99, 104, 111, 121, 130, 139, 148, 157, 164, 172, 183, 193, 201 8, 17, 26, 34, 43, 52, 60, 67, 76, 84, 91, 98, 103, 112, 120, 129, 138, 147, 156, 163, 171, 177, 184, 192, 200, 208 23:19,16:10,7:2,207:204 24 I/O I 3.3V power supply. Definition
VCC
I Ground.
VSS
LA[21:0] RESET# TDMDX
O I O I
Device address output. Reset. TDM transmit data output. ROM Select. RSEL 0 1 Selection 16-bit ROM 8-bit ROM
RSEL
25
TDMDR TDMCLK TDMFS TDMTSC# TWS
28 29 30 31
I I I O O
TDM receive data input. TDM clock input. TDM frame sync. TDM output enable. Audio transmit frame sync output. System and DSCK output clock frequency selection at reset time. The matrix below lists the available clock frequencies and their respective PLL bit settings.. SEL_PLL2 0 0 0 0 1 1 1 1 SEL_PLL1 0 0 1 1 0 0 1 1 SEL_PLL0 0 1 0 1 0 1 0 1 Clock Output VCO doesn't work. 27 MHz Bypass mode 54 MHz 121.5 MHz 81 MHz 94.5 MHz 108 MHz
SEL_PLL1
32
TSD SEL_PLL0 SEL_PLL2 NC MCLK TBCK RSD RWS RBCK APLLCAP
33 36 37, 38, 41, 42, 146:142, 155:149, 158, 203:202 39 40 45 46 47 48
O I I -- I/O I/O I I I I
Audio transmit serial data output. Refer to the description and matrix for SEL_PLL1 pin 32. Refer to the description and matrix for SEL_PLL1 pin 32. No connect. Leave open. Audio master clock for audio DAC. Audio transmit bit clock output. Audio receive serial data input. Audio receive frame sync input. Audio receive bit clock input. Analog PLL capacitor input.
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SAM0358-052201
ESS Technology, Inc.
ES4428/ES4427 PRODUCT BRIEF
Table 1 ES4428 Pin Descriptions (Continued)
Name XIN XOUT DMA[11:0] DCAS# DOE# DSCK_EN DWE# DRAS0# DRAS1# DBANKSEL1 DRAS2# DBANKSEL0 DB[15:0] DCS[1:0]# DQM DSCK DCLK YUV[7:0] PCLK2XSCN PCLKQSCN VSYNC# HSYNC# HD[15:0] VPP AUX[7:0] LOE# LCS[3:0]# LD[15:0] LWRLL# LWRHL# 96:93, 90:85, 82:77 97, 100 101 102 105 115:113, 110:106 116 117 118 119 141:140, 137:131, 128:122 159 169:165,162:160 170 176:173 197:194, 191:185, 182:178 198 199 74 71 72 73 Number 49 50 66:61, 58:53 69 70 I/O I O O O O O O O O O O O I/O O O O I O I/O I/O I/O I/O I/O I I/O O O I/O O O Definition Crystal input. Crystal output. DRAM address bus [11:0]. DRAM column address strobe. DRAM output enable. DRAM clock enable. DRAM write enable. DRAM row address strobe 0. DRAM row address strobe 1 (active-low). DRAM address bus select 1 output. Only active in 64Mb SDRAM mode. DRAM row address strobe 2 output. DRAM address bus select 0 output. Only active in 64Mb SDRAM mode. DRAM data bus [15:0]. SDRAM chip select [1:0]. Data input/output mask. Output clock to SDRAM. 27 MHz clock input to PLL. 8-bit YUV output. 2X pixel clock. Pixel clock. Vertical sync. Horizontal sync. Host data bus 5.0V power supply. Auxiliary ports. EPROM device output enable. EPROM chip select [3:0]. EPROM device data bus. Device write enable. Device write enable (active-low).
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SAM0358-052201
ESS Technology, Inc.
ES4428/ES4427 PRODUCT BRIEF
ES4427 PINOUT
Figure 2 shows the ES4427 device pinout.
2XPCLK VREFM VCCAV VCCAV VSSAA VSSAV VSSAV VSSAV VSSAV COMP CDAC VDAC YDAC XOUT ACAP RSET VREF PCLK AUX3 AUX4 AUX5 AUX6 VCC VCC VCC VSS VSS VSS
DSC_D7 HSYN_B DSC_D6 VSYN_B DSC_D5 YUV7 YUV6 YUV5 YUV4 VCC VSS YUV3 DSC_D4 YUV2 DSC_D3 YUV1 DSC_D2 YUV0 DSC_D1 VSS
81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
XIN
NC
50 49 48 47 46 45 44 43
MIC1 MIC2 AOL+ AOLAORAOR+ VCCAA VREFP VCM VSSAA AUX15/IR AUX14 AUX13 RBCK/SER_IN AUX12/C2PO AUX11/IRQ AUX10 RSD/SEL_PLL0 VCC VSS
ES4427
100-pin PQFP
42 41 40 39 38 37 36 35 34 33 32
31 100 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
RESET_B
MUTE
TBCK
RSTOUT_B
DSC_S
VSS
VSS
DCLK/EXT_CLK
MCLK
AUX0
AUX1
AUX2
AUX7
AUX8
DSC_D0
AUX9
RWS/SEL_PLL1
VCC
DSC_C
VCC
VSS
TSD
NC
NC
NC
NC
NC
NC
Figure 2 ES4427 Device Pinout
ES4427 PIN DESCRIPTION
Table 2 lists the pin descriptions for the ES4427.
Table 2 ES4427 Pin Descriptions
Name VSS NC VCC DSC_C AUX0 DSC_D[7:0] AUX1 DSC_S AUX2 DCLK EXT_CLK RESET# AUX7 MUTE MCLK 13 14 15 17 Number 1, 25:26, 31, 72, 75, 77, 91, 100 2:4, 27:30, 76 5, 16, 32, 66, 73, 78, 90 6 7 8, 81, 83, 85, 93, 95, 97, 99 9 10 11 12 I I I/O I/O I/O I I/O O I I I/O O I I/O I Definition Ground. No connect. 5.0V power supply. Clock for programming to access internal registers. General purpose I/O. Data for programming to access internal registers. General purpose I/O. Strobe for programming to access internal registers. General purpose I/O. MPEG decoder output clock. EXT_CLK is the external clock EXT_CLK is an input during bypass PLL mode. Reset. General purpose I/O. Audio mute. Audio master clock.
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SAM0358-052201
TWS/SPLL_OUT
NC
ESS Technology, Inc.
ES4428/ES4427 PRODUCT BRIEF
Table 2 ES4427 Pin Descriptions (Continued)
Name AUX8 TWS SPLL_OUT AUX9 TSD TBCK RWS 20 21 22 Number 18 19 I/O I/O I O I/O I I O I Definition General purpose I/O. Transmit audio frame sync. SPLL_OUT is the select PLL output. General purpose I/O. Transmit audio data input. Transmit audio bit clock. Receive audio frame sync. System and DSCK output clock frequency selection at reset time. The matrix below lists the available clock frequencies and their respective PLL bit settings.. SEL_PLL1 0 0 1 1 O O 33 34 35 36 I I/O I/O I/O O 37 38 39 40 41,51 42 43 44 45, 46 47, 48 49 50 52 53 54 55 56:57, 62:63 58 59, 60 I I/O I/O I/O I I I I O O I I I I I I I O I Reset output. Receive audio data input. Refer to the description and matrix for SEL_PLL1 pin 23. General purpose I/O. Interrupt output to ES4428. CD loader C2PO. Receive audio bit output clock. SER_IN is the serial input DSC mode. 1 = Serial DSC mode. 0 = Parallel DSC mode. General purpose I/O. Interrupt input from Modem DSP. IR interrupt Input. Audio analog ground. ADC Common Mode Reference (CMR) buffer output. CMR is approximately 2.25 V. Bypass to analog ground with 47 F electrolytic in parallel with 0.1 F. DAC and ADC maximum reference. Bypass to VCMR with 10 F in parallel with 0.1 F. 5.0V analog audio power supply. Right channel output. Left channel output. Microphone input 2. Microphone input 1. Internal resistor divider generates Common Mode Reference (CMR) voltage. Bypass to analog ground with 0.1 F. DAC and ADC minimum reference. Bypass to VCMR with 10 F in parallel with 0.1 F. Full scale DAC current adjustment. Compensation pin. Video analog ground Modulated chrominance output. Video VCC, 5 V SEL_PLL0 0 1 0 1 DCLK Bypass PLL (input mode) 27 MHz (output mode) Default 32.4 MHz (output mode) 40.5 MHz (output mode)
SEL_PLL1
23
RSTOUT# RSD SEL_PLL0 AUX10 AUX11 AUX12 RBCK SER_IN AUX13 AUX14 AUX15 VSSAA VCM VREFP VCCAA AOR+, AORAOL-, AOL+ MIC2 MIC1 VREF VREFM RSET COMP VSSAV CDAC VCCAV
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SAM0358-052201
ESS Technology, Inc.
ES4428/ES4427 PRODUCT BRIEF
Table 2 ES4427 Pin Descriptions (Continued)
Name YDAC VDAC ACAP AUX6 AUX5 AUX4 AUX3 XOUT XIN PCLK 2XPCLK HSYNC# VSYNC# YUV[7:0] Number 61 64 65 67 68 69 70 71 74 79 80 82 84 86:89, 92, 94, 96, 98 I/O O O I I/O I/O I/O I/O O I I/O I/O O O I Definition Y luminance data bus for screen video port. Composite video output. Audio CAP General purpose I/O. General purpose I/O. Modem DSP reset. CD loader reset. Crystal output. 27 MHz crystal input. 13.5 MHz pixel clock. 27 MHz doubled pixel clock. Horizontal sync. Vertical sync. YUV data bus for screen video port.
SYSTEM BLOCK DIAGRAM
Figure 3 shows a sample system block diagram of an ESS-based Web/DVD system.
Phone Line Remote Control/ Wireless Keyboard
ES2898 Modem DSP ES2828 MC'97 AFE Front Panel Interface SDRAM ROM or Flash ROM
Video Encoder
ES4428 Web/DVD Processor
Audio DAC ES4427 Companion Chip Smart Card (ISO 7816-3)
DVD Drive
Figure 3 ES4428/ES4427 System Block Diagram
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SAM0358-052201
ESS Technology, Inc.
ES4428/ES4427 PRODUCT BRIEF
MECHANICAL DIMENSIONS, ES4428
Figure 4 shows the mechanical dimensions of the ES4428.
D D1 D3
156 105
157
104
Note: 1. All dimensions are in inches (millimeters). 2. Actual package used has millimeter native dimensions - take care with rounding from metric to imperial.
Symbol
A
Min
- 0.010 (0.25) 0.130 (3.30) 0.007 (0.18) 0.005 (0.12) 1.195 (30.35) 1.098 (27.90)
Nom
- - 0.134 (3.40) 0.009 (0.23) 0.006 (0.16) 1.205 (30.60) 1.102 (28.00) 1.004 (25.50) REF 0.0197 (0.50) BASIC
Max
0.165 - 0.138 (3.50) 0.011 (0.28) 0.008 (0.20) 1.215 (30.85) 1.106 (28.10)
E3 E1
E
A1 A2 B C D D1 D3
208
Index Pin 1 1 52
53
e E E1 E3 1.195 (30.35) 1.098 (27.90)
1.205 (30.60) 1.102 (28.00) 1.004 (25.50) REF
1.215 (30.85) 1.106 (28.10)
A
L
e
0.016 (0.40) 0i
0.020 (0.50) 2.5 i
0.024 (0.60) 5.0 i
see detail
A2 A1
B
L
C
Figure 4 ES4428 Mechanical Dimensions
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SAM0358-052201
ESS Technology, Inc.
ES4428/ES4427 PRODUCT BRIEF
MECHANICAL DIMENSIONS, ES4427
Figure 5 shows the mechanical dimensions of the ES4427.
D D1
A2
A1
ES4427
E E1
100-Pin PQFP
L
e b
e1 L1
1
Symbol D D1 E E1 A1 A2 b e e1 L L1 -
Description Lead to lead, X-axis Package's outside, X-axis Lead to lead, Y-axis Package's outside, Y-axis Board standoff Package thickness Lead width Lead pitch Lead gap Foot length Lead length Foot angle Coplanarity Leads in X-axis Leads in Y-axis Total leads Package type
Millimeters Min 23.65 19.90 17.65 13.90 0.10 2.57 0.20 0.24 0.65 1.88 0 Nom 23.90 20.00 17.90 14.00 0.25 2.71 0.30 0.65 0.80 1.95 30 20 100 PQFP Max 24.15 20.10 18.15 14.10 0.36 2.87 0.40 0.95 2.02 7 0.102 -
Figure 5 ES4427 Mechanical Dimensions
ESS Technology, Inc.
SAM0358-052201
9
ES4428/ES4427 PRODUCT BRIEF
ORDERING INFORMATION
Part Number ES4428 ES4427 Description Web DVD Processor Companion Chip Package 208-pin PQFP 100-pin PQFP
No part of this publication may be reproduced, stored in a retrieval system, transmitted, or translated in any form or by any means, electronic, mechanical, manual, optical, or otherwise, without the prior written permission of ESS Technology, Inc. ESS Technology, Inc. makes no representations or warranties regarding the content of this document.
All specifications are subject to change without prior notice. ESS Technology, Inc. assumes no responsibility for any errors contained herein. (P) U.S. Patent 4,214,125 and others, other patents pending. All other trademarks are owned by their respective holders and are used for identification purposes only.
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(c) 2000--2001 ESS Technology, Inc. All rights reserved.
SAM0358-052201

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